Protect IGBTs by Sensing Current Using Optical Isolation Amplifi ers

Posted on Wednesday, May 16th, 2012 and is filed under General. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.

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Analog designers can finally receive the productivity boost they need with Tanner's layout acceleration tool: HiPer DevGen.

The tool automatically reads a netlist to identify and then generate key analogue design primitives including resistor arrays, current mirrors and differential pairs. HiPer L-Edit DevGen dramatically improves layout productivity and reduces design cycle time, while generating structures at a very high level of quality.

This month and exclusively for EETimes Europe readers, Tanner is offering a three-month license of HiPer L-Edit DevGen, worth 1500 euros, open to five companies.

And the winners are...

In our previous reader offer, Future Technology Devices International was giving away three Android application development packages worth 550 Euros each.

Lucky winners include Mr. J. Valls Martí from Spain, Mr K. Bremner from the UK, and Mr J. Bjarnoe from Denmark.

All should be receiving their kits soon. Let's wish them some interesting findings with their projects.


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